论文标题

极地代码的组合多内核解码器

A Combinational Multi-Kernel Decoder for Polar Codes

论文作者

Rezaei, Hossein, Rajatheva, Nandana, Latva-aho, Matti

论文摘要

由于其能力达到了特征,因此已将极地代码选为第五代(5G)通信系统中控制通道的通道编码方案。但是,传统的极性代码仅支持由二进制(2x2)内核构建的代码,该代码将代码长度限制为2的幂。提出了多内核极性代码以实现灵活的块长度。在本文中,提出了基于连续的取消算法的多内核极性代码的第一个组合解码器。所提出的解码器可以解码纯二进制和二进制(3x3)混合极性代码。该体系结构具有在线费率分配的能力,并支持任何内核序列。 FPGA实现结果表明,对于长度n = 48的代码,可以实现812.1 Mbps的编码吞吐量。

Polar codes have been selected as the channel coding scheme for control channel in the fifth generation (5G) communication system thanks to their capacity achieving characteristics. However, the traditional polar codes support only codes constructed by binary (2x2) kernel which limits the code lengths to powers of 2. Multi-kernel polar codes are proposed to achieve flexible block length. In this paper, the first combinational decoder for multi-kernel polar codes based on successive cancellation algorithm is proposed. The proposed decoder can decode pure-binary and binary-ternary (3x3) mixed polar codes. The architecture is rate-flexible with the capability of online rate assignment and supports any kernel sequences. The FPGA implementation results reveal that for a code of length N = 48, the coded throughput of 812.1 Mbps can be achieved.

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