论文标题
带有动态时钟源和多宽度说明的微处理器设计
Microprocessor Design with Dynamic Clock Source and Multi-Width Instructions
论文作者
论文摘要
本文基于RISC-V指令集体系结构介绍了一个新颖的32位微处理器，它利用动态时钟源来实现高效率，克服了硬件延迟的限制。此外，微处理器还旨在使用基本（32位）指令和16位压缩说明进行操作。使用ModelsIM进行理想的结果进行设计的测试。
This paper introduces a novel 32-bit microprocessor, based on the RISC-V instruction set architecture, is designed,utilising a dynamic clock source to achieve high efficiency, overcoming the limitations of hardware delays. In addition, the microprocessor is also aimed to operate with both base (32-bit) instructions and 16-bit compressed instructions. The testing of the design is carried out using ModelSim with an ideal result.
