论文标题
自动机处理中的确定性与非确定性有限自动机
Deterministic vs. Non Deterministic Finite Automata in Automata Processing
论文作者
论文摘要
线性时间模式匹配引擎使用有限自动机(FA)作为其计算模型看到了令人鼓舞的结果。在不同的FA变体中,确定性(DFA)和非确定性(NFA)是基于FA的模式匹配引擎最常用的计算模型。此外,NFA是空间体系结构的模式匹配引擎中的普遍模型。原因是:i)DFA大小,因为与#States中的大小相比,与等效的NFA相比,DFA可以指数级,ii)DFA无法利用空间体系结构上可用的大量并行性。本文对最小化DFA的#State进行了一项经验研究,并在各种现实世界中的基准中优化了NFA,并表明,如果为不同的模式生成不同的DFA,则最小DFA的#State通常等于其等量优化的NFA。但是,NFA在维持某些基准测试的低#States方面更有坚固。因此,空间结构的NFA和DFA的选择不如为每种模式生成不同DFA的需要并支持这些独特的DFA的并行处理。最后,本文为冯·诺伊曼(Von Neumann)基于架构(CPU)与基于空间体系结构(FPGA)自动机处理引擎的吞吐量研究。研究表明,基于工作量,基于CPU的自动机处理引擎和基于FPGA的自动机处理引擎既不是明显的赢家。如果#patterns匹配每个工作负载,则基于CPU的自动机处理引擎的吞吐量会减少。另一方面,基于FPGA的自动机处理引擎缺乏内存溢出选项。因此,如果不适合FPGA的逻辑结构,它将无法容纳整个自动机。在最佳情况下,CPU在FPGA上具有4.5倍的速度,而对于某些基准,FPGA在CPU上具有32,530倍的速度。
Linear-time pattern matching engines have seen promising results using Finite Automata (FA) as their computation model. Among different FA variants, deterministic (DFA) and non-deterministic (NFA) are the most commonly used computation models for FA-based pattern matching engines. Moreover, NFA is the prevalent model in pattern matching engines on spatial architectures. The reasons are: i) DFA size, as in #states, can be exponential compared to equivalent NFA, ii) DFA cannot exploit the massive parallelism available on spatial architectures. This paper performs an empirical study on the #state of minimized DFA and optimized NFA across a diverse set of real-world benchmarks and shows that if distinct DFAs are generated for distinct patterns, #states of minimized DFA are typically equal to their equivalent optimized NFA. However, NFA is more robust in maintaining the low #states for some benchmarks. Thus, the choice of NFA vs. DFA for spatial architecture is less important than the need to generate distinct DFAs for each pattern and support these distinct DFAs' parallel processing. Finally, this paper presents a throughput study for von Neumann's architecture-based (CPU) vs. spatial architecture-based (FPGA) automata processing engines. The study shows that, based on the workload, neither CPU-based automata processing engine nor FPGA-based automata processing engine is the clear winner. If #patterns matched per workload increases, the CPU-based automata processing engine's throughput decreases. On the other hand, the FPGA-based automata processing engine lacks the memory spilling option; hence, it fails to accommodate an entire automata if it does not fit into FPGA's logic fabric. In the best-case scenario, the CPU has a 4.5x speedup over the FPGA, while for some benchmarks, the FPGA has a 32,530x speedup over the CPU.