论文标题

量子Toffoli门的硬件意识优化

Hardware-Conscious Optimization of the Quantum Toffoli Gate

论文作者

Bowman, Max Aksel, Gokhale, Pranav, Larson, Jeffrey, Liu, Ji, Suchara, Martin

论文摘要

尽管量子计算在组合优化,电子结构计算和数字理论方面具有巨大的潜力,但量子计算的当前时代受噪声硬件的限制。许多量子汇编方法可以通过优化诸如临界路径长度等目标的量子电路来减轻不完美硬件的影响。很少有方法可以根据目标硬件可用的供应商校准操作(即本机门)来考虑量子电路。该手稿扩展了在此抽象水平上优化量子电路的分析和数值方法。我们提出了将分析天然栅极级优化与数值优化相结合的强度。尽管我们专注于在IBMQ天然门集上优化Toffoli门,但提出的方法可推广到任何门和超导量子架构。我们优化的Toffoli Gate实施情况表明,与具有量子过程断层扫描的IBM Jakarta标准标准的规范实现相比,不忠的$ 18 \%$降低。假设在IBMQ天然门集中包含多Qubit互音(MCR)门,我们生产的Toffoli实现只有六个多Qubit Gates,从规范的八个多Qubit实现的$ 25 \%$减少了线性连接的Qubits。

While quantum computing holds great potential in combinatorial optimization, electronic structure calculation, and number theory, the current era of quantum computing is limited by noisy hardware. Many quantum compilation approaches can mitigate the effects of imperfect hardware by optimizing quantum circuits for objectives such as critical path length. Few approaches consider quantum circuits in terms of the set of vendor-calibrated operations (i.e., native gates) available on target hardware. This manuscript expands the analytical and numerical approaches for optimizing quantum circuits at this abstraction level. We present a procedure for combining the strengths of analytical native gate-level optimization with numerical optimization. Although we focus on optimizing Toffoli gates on the IBMQ native gate set, the methods presented are generalizable to any gate and superconducting qubit architecture. Our optimized Toffoli gate implementation demonstrates an $18\%$ reduction in infidelity compared with the canonical implementation as benchmarked on IBM Jakarta with quantum process tomography. Assuming the inclusion of multi-qubit cross-resonance (MCR) gates in the IBMQ native gate set, we produce Toffoli implementations with only six multi-qubit gates, a $25\%$ reduction from the canonical eight multi-qubit implementations for linearly connected qubits.

扫码加入交流群

加入微信交流群

微信交流群二维码

扫码加入学术交流群,获取更多资源