论文标题
Érø：混合批判性空降系统的平台体系结构
Ærø: A Platform Architecture for Mixed-Criticality Airborne Systems
论文作者
论文摘要
具有资源限制的实时嵌入式平台可以利用混合批判性系统的好处，在具有不同临界级别共享计算资源的应用中，在时间和空间域中隔离。传统的基于软件的隔离机制增加了额外的开销，并需要具有系统中存在最高批判性的认证，这通常是一个昂贵的过程。在本文中，我们提出了一种不同的方法，在该方法中，通过在处理器中的分区中特征在硬件级别上建立所需的隔离。引入了一个四阶段的管道软化处理器，并引入了具有复制资源的数据路径，以建立分区之间的隔离和避免干扰。在硬件中实现了一个周期准确的调度机制，用于硬件进行硬式分区调度，该计划可以根据用户需求满足每个分区的不同周期性和执行时间，同时在单个应用程序级别保留时间预测性。在分区内运行的应用程序没有虚拟化的感觉，可以在主机软件上或直接在硬件上执行。提出的体系结构在FPGA线程上实现，并使用航空电子用例演示。
Real-time embedded platforms with resource constraints can take the benefits of mixed-criticality system where applications with different criticality-level share computational resources, with isolation in the temporal and spatial domain. A conventional software-based isolation mechanism adds additional overhead and requires certification with the highest level of criticality present in the system, which is often an expensive process. In this article, we present a different approach where the required isolation is established at the hardware-level by featuring partitions within the processor. A four-stage pipelined soft-processor with replicated resources in the data-path is introduced to establish isolation and avert interference between the partitions. A cycle-accurate scheduling mechanism is implemented in the hardware for hard-real-time partition scheduling that can accommodate different periodicity and execution time for each partition as per user needs, while preserving time-predictability at the individual application level. Applications running within a partition has no sense of the virtualization and can execute either on a host-software or directly on the hardware. The proposed architecture is implemented on FPGA thread and demonstrated with an avionics use case.
