论文标题

仪表理论需要多少个量子门?

How many quantum gates do gauge theories require?

论文作者

Murairi, Edison M., Cervia, Michael J., Kumar, Hersh, Bedaque, Paulo F., Alexandru, Andrei

论文摘要

我们讨论了在数字量子计算机上的实施晶格量规理论的实施,主要集中在模拟其时间演变所需的量子门数量上。我们发现,使用我们自己的增强功能使用可用的最新方法来编译量子电路,在量子硬件的当前时代,基本plaquette的单个时间步骤的成本超出了合理实用的范围。但是,我们观察到,这种成本对截断方案高度敏感,该截断方案用于推导非亚洲仪表理论的不同汉密尔顿公式,强调了与所需理论相同的普遍性类别中这种模型中这种模型的低维截断的需求。

We discuss the implementation of lattice gauge theories on digital quantum computers, focusing primarily on the number of quantum gates required to simulate their time evolution. We find that to compile quantum circuits, using available state-of-the-art methods with our own augmentations, the cost of a single time step of an elementary plaquette is beyond what is reasonably practical in the current era of quantum hardware. However, we observe that such costs are highly sensitive to the truncation scheme used to derive different Hamiltonian formulations of non-Abelian gauge theories, emphasizing the need for low-dimensional truncations of such models in the same universality class as the desired theories.

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