论文标题
REPIPI：可重新配置的硅 - 光子2.5D chiplet网络，具有用于节能插入器通信的PCM
ReSiPI: A Reconfigurable Silicon-Photonic 2.5D Chiplet Network with PCMs for Energy-Efficient Interposer Communication
论文作者
论文摘要
已经提出了2.5D芯片系统，以提高大型芯片的低生产率。但是，通过电子插音器将芯片连接起来会在插音机网络上施加高交通负荷。硅光子技术在芯片内芯片（NOC）织物中处理高潜伏期的大量流量表现出了巨大的希望。尽管硅光子设备的最新进展已经扩展了光子NOC，以在2.5D花栗鼠系统中实现高带宽通信，但此类基于插入器的光子网络仍然遭受高功率消耗的影响。在这项工作中，我们设计和分析了一种新型的可重构功率和拥堵感的硅光子2.5D插入器网络，称为Resipi。考虑到运行时流量，Resipi能够动态部署片间光子网关，以改善整体网络拥塞。 Resipi还采用基于相变材料（PCM）的开关元素来动态重新配置并为光子插入器网络提供动力，从而提高了网络功率效率。与最好的先前最新2.5D光子网络相比，Resipi平均表明，该网络中的潜伏期降低了37％，功率降低25％和53％的能量最小化。
2.5D chiplet systems have been proposed to improve the low manufacturing yield of large-scale chips. However, connecting the chiplets through an electronic interposer imposes a high traffic load on the interposer network. Silicon photonics technology has shown great promise towards handling a high volume of traffic with low latency in intra-chip network-on-chip (NoC) fabrics. Although recent advances in silicon photonic devices have extended photonic NoCs to enable high bandwidth communication in 2.5D chiplet systems, such interposer-based photonic networks still suffer from high power consumption. In this work, we design and analyze a novel Reconfigurable power-efficient and congestion-aware Silicon Photonic 2.5D Interposer network, called ReSiPI. Considering run-time traffic, ReSiPI is able to dynamically deploy inter-chiplet photonic gateways to improve the overall network congestion. ReSiPI also employs switching elements based on phase change materials (PCMs) to dynamically reconfigure and power-gate the photonic interposer network, thereby improving the network power efficiency. Compared to the best prior state-of-the-art 2.5D photonic network, ReSiPI demonstrates, on average, 37% lower latency, 25% power reduction, and 53% energy minimization in the network.
