论文标题
在硬件中实现数据包修剪支持
Implementing packet trimming support in hardware
论文作者
论文摘要
数据包修剪是针对数据中心网络提出的原始性：为了最大程度地减少延迟，交换机运行小队列；当队列溢出时，而不是掉落数据包，开关将数据包有效载荷剪下，然后将标题转发到目的地或回到源。通过这种方式，可以建立一个低潜伏期网络，这在很大程度上是无损的。理想情况下，修剪将作为开关ASIC中的原始实施，但是硬件开发周期缓慢，昂贵，并且需要证明的客户需求。在本文中，我们调查了如何在未考虑修剪的现有可编程开关中实现修剪，特别关注Tofino Switch ASIC上的P4实现。我们表明，确实有可能紧密近似理想化的修剪，并证明可以将修剪整合到生产级数据中心交换机软件堆栈中。
Packet trimming is a primitive that has been proposed for datacenter networks: to minimize latency, switches run small queues; when the queue overflows, rather than dropping packets the switch trims off the packet payload and either forwards the header to the destination or back to the source. In this way a low latency network that is largely lossless for metadata can be built. Ideally, trimming would be implemented as a primitive in switch ASICs, but hardware development cycles are slow, costly, and require demonstrated customer demand. In this paper we investigate how trimming can be implemented in existing programmable switches which were not designed with trimming in mind, with a particular focus on a P4 implementation on the Tofino switch ASIC. We show that it is indeed possible to closely approximate idealized trimming and demonstrate that trimming can be integrated into a production-grade datacenter switch software stack.
