论文标题
并非所有掉期都具有相同的成本：优化量子量子的情况
Not All SWAPs Have the Same Cost: A Case for Optimization-Aware Qubit Routing
论文作者
论文摘要
尽管量子计算技术取得了迅速的进步，但量子量连接限制仍然是一个关键挑战。近期NISQ量子计算机和相对长期的可扩展量子体系结构都无法完全连接。结果，量子电路可能不会在量子硬件上直接执行，并且量子编译器需要执行固定路由以使电路与设备布局兼容。在Qubit路由步骤中，编译器插入交换门并执行电路变换。鉴于目标硬件的连通性拓扑，通常有多个Qubit路由候选者。最先进的编译器使用成本函数来评估不同路由的交换门数，然后选择具有最小交换门数的掉期。量子路由后，量子编译器用新插入的交换门在电路上进行门口优化。 在本文中，我们观察到上述量子路由并不是最佳的，并且量子路由应\ textit {non}在后续门优化中独立。我们发现，考虑到门的优化，并非所有交换门都具有相同的基础门成本。这些见解导致我们的Qubit路由算法的发展（并非所有掉期都具有相同的成本）。 NASSC是第一种考虑路由步骤中后续优化的算法。我们的优化感知量子路由导致更好的路由决策和随后的优化。我们还为插入的交换门提出了一个新的优化意识分解。我们的实验表明，与我们的路由算法一起编译的路由开销降低了$ 69.30 \％$（平均$ 21.30 \％$ $ $ $），而CNOT门数则低至$ 43.50 \％\％$（平均$ 7.61 \％$ $ $），而电路深度则与您的状态有关。
Despite rapid advances in quantum computing technologies, the qubit connectivity limitation remains to be a critical challenge. Both near-term NISQ quantum computers and relatively long-term scalable quantum architectures do not offer full connectivity. As a result, quantum circuits may not be directly executed on quantum hardware, and a quantum compiler needs to perform qubit routing to make the circuit compatible with the device layout. During the qubit routing step, the compiler inserts SWAP gates and performs circuit transformations. Given the connectivity topology of the target hardware, there are typically multiple qubit routing candidates. The state-of-the-art compilers use a cost function to evaluate the number of SWAP gates for different routes and then select the one with the minimum number of SWAP gates. After qubit routing, the quantum compiler performs gate optimizations upon the circuit with the newly inserted SWAP gates. In this paper, we observe that the aforementioned qubit routing is not optimal, and qubit routing should \textit{not} be independent on subsequent gate optimizations. We find that with the consideration of gate optimizations, not all of the SWAP gates have the same basis-gate cost. These insights lead to the development of our qubit routing algorithm, NASSC (Not All Swaps have the Same Cost). NASSC is the first algorithm that considers the subsequent optimizations during the routing step. Our optimization-aware qubit routing leads to better routing decisions and benefits subsequent optimizations. We also propose a new optimization-aware decomposition for the inserted SWAP gates. Our experiments show that the routing overhead compiled with our routing algorithm is reduced by up to $69.30\%$ ($21.30\%$ on average) in the number of CNOT gates and up to $43.50\%$ ($7.61\%$ on average) in the circuit depth compared with the state-of-the-art scheme, SABRE.
