论文标题
CEDR-编译器集成，可扩展的DSSOC运行时
CEDR -- A Compiler-integrated, Extensible DSSoC Runtime
论文作者
论文摘要
在这项工作中，我们提出了CEDR，这是芯片运行时生态系统上的编译器集成，可扩展的域特异性系统，以促进研究在统一的编译时间和运行时间工作流程中，在统一的插入式集成点上解决建筑，系统软件和应用程序开发的挑战。我们演示了CEDR在Xilinx Zynq MPSOC-ZCU102上的实用性，以评估SOC配置贸易空间，安排政策和工作量的复杂性，基于动态到达的工作负载方案，该场景由真实的生活信号处理应用于FFT和Matrerix的fft scastrator scapections cormance coppection，安排政策和工作量的复杂性。我们通过许多不同的案例研究提供了对该设计空间中存在的权衡的见解。 CEDR是便携式的，已在Odroid-XU3，X86和Nvidia Jetson Xavier的SOC平台上进行了部署和验证。综上所述，CEDR是一个有能力的环境，可在探索生产应用程序开发，资源管理启发式发展以及用于异质体系结构的硬件配置分析的界限。
In this work, we present CEDR, a Compiler-integrated, Extensible Domain Specific System on Chip Runtime ecosystem to facilitate research towards addressing the challenges of architecture, system software and application development with distinct plug-and-play integration points in a unified compile time and run time workflow. We demonstrate the utility of CEDR on the Xilinx Zynq MPSoC-ZCU102 for evaluating performance of pre-silicon hardware in the trade space of SoC configuration, scheduling policy and workload complexity based on dynamically arriving workload scenarios composed of real-life signal processing applications scaling to thousands of application instances with FFT and matrix multiply accelerators. We provide insights into the trade-offs present in this design space through a number of distinct case studies. CEDR is portable and has been deployed and validated on Odroid-XU3, X86 and Nvidia Jetson Xavier based SoC platforms. Taken together, CEDR is a capable environment for enabling research in exploring the boundaries of productive application development, resource management heuristic development, and hardware configuration analysis for heterogeneous architectures.
