论文标题
FPGA扩展通用计算机体系结构
FPGA-extended General Purpose Computer Architecture
论文作者
论文摘要
本文介绍了计算机体系结构，其中指令集体系结构（ISA）的一部分是在小型高度集成的现场可编程栅极阵列（FPGA）上实现的。通用处理器（CPU）内的小型FPGA可以有效地实现自定义或标准化指令。我们提出的架构直接解决了对高端CPU的相关挑战，在这种挑战中，这种高度集成的FPGA将产生最大的影响，例如在主要记忆带宽上。这也使软件透明的上下文开关。动态可重构核心的基于仿真的评估显示出令人鼓舞的结果，该结果与所有启用指令接近等效核心的性能。最后，通过快速可调节的FPGA和研究Opcodes的错过行为，研究了当今CPU中采用拟议的体系结构的可行性。
This paper introduces a computer architecture, where part of the instruction set architecture (ISA) is implemented on small highly-integrated field-programmable gate arrays (FPGAs). Small FPGAs inside a general-purpose processor (CPU) can be used effectively to implement custom or standardised instructions. Our proposed architecture directly address related challenges for high-end CPUs, where such highly-integrated FPGAs would have the highest impact, such as on main memory bandwidth. This also enables software-transparent context-switching. The simulation-based evaluation of a dynamically reconfigurable core shows promising results approaching the performance of an equivalent core with all enabled instructions. Finally, the feasibility of adopting the proposed architecture in today's CPUs is studied through the prototyping of fast-reconfigurable FPGAs and studying the miss behaviour of opcodes.
