论文标题

高性能电子应用的可扩展,高度结晶,2D半导体原子层沉积过程

Scalable, Highly Crystalline, 2D Semiconductor Atomic Layer Deposition Process for High Performance Electronic Applications

论文作者

Aspiotis, Nikolaos, Morgan, Katrina, März, Benjamin, Müller-Caspary, Knut, Ebert, Martin, Huang, Chung-Che, Hewak, Daniel W., Majumdar, Sayani, Zeimpekis, Ioannis

论文摘要

这项工作证明了原子上薄的2D半导体的大型面积过程,以解锁其商业吸收所需的技术高档。新的原子层沉积(ALD)和转换技术产生了较大的面积性能均匀性和可调性。像石墨烯一样,2D过渡金属二甲化合物(TMDC)容易提高限制其商业吸收的挑战。他们具有挑战性地在大型底物上统一生长,并在替代基板上转移,而它们通常缺乏大面积的电性能均匀性。这项工作的可扩展ALD过程使2D TMDC在大面积上均匀地生长,并独立控制层厚度,化学计量和结晶度,同时允许无化学的转移到应用底物。使用该过程在柔性底物上制造的现场效应晶体管(FET)呈现高达55 cm^2/vs的现场效应迁移率,亚阈值降低至80 mV/dec/dec/dec/oft/off比率为10^7。此外,还展示了使用铁电FET(FEFET)(FEFET)在 +-5 V处运行的非易失性存储器晶体管,开/OFF比为107,存储窗口为3.25 V。这些FEFET显示出具有多个状态切换的最先进性能,适用于单晶体管非挥发性内存,以及突触晶体管,揭示了该过程对柔性神经形态应用的适用性。

This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required for their commercial uptake. The new atomic layer deposition (ALD) and conversion technique yields large area performance uniformity and tunability. Like graphene, 2D Transition Metal Dichalcogenides (TMDCs) are prone to upscaling challenges limiting their commercial uptake. They are challenging to grow uniformly on large substrates and to transfer on alternative substrates while they often lack in large area electrical performance uniformity. The scalable ALD process of this work enables uniform growth of 2D TMDCs on large area with independent control of layer thickness, stoichiometry and crystallinity while allowing chemical free transfers to application substrates. Field effect transistors (FETs) fabricated on flexible substrates using the process present a field effect mobility of up to 55 cm^2/Vs, subthreshold slope down to 80 mV/dec and on/off ratios of 10^7. Additionally, non-volatile memory transistors using ferroelectric FETs (FeFETs) operating at +-5 V with on/off ratio of 107 and a memory window of 3.25 V are demonstrated. These FeFETs demonstrate state-of-the-art performance with multiple state switching, suitable for one-transistor non-volatile memory and for synaptic transistors revealing the applicability of the process to flexible neuromorphic applications.

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