论文标题
经济高效的查找桌子基于二元编码的十进制加法设计
A Cost-Efficient Look-Up Table Based Binary Coded Decimal Adder Design
论文作者
论文摘要
BCD（二进制编码十进制）是易于转换的更准确和可读性的表示，在计算和电子通信中占有普遍性。在本文中，提出了一种树结构的平行BCD添加算法，并具有降低的时间复杂性。由于FPGA（现场可编程栅极阵列）技术的枚举好处和应用，因此BCD加法器基于LUT（查找表）的设计更有效。本文的主要贡献是基于LUT的BCD加法电路的尺寸最小和深度最小的BCD加法电路。
The BCD (Binary Coded Decimal) being the more accurate and human-readable representation with ease of conversion, is prevailing in the computing and electronic communication.In this paper, a tree-structured parallel BCD addition algorithm is proposed with the reduced time complexity. BCD adder is more effective with a LUT (Look-Up Table)-based design, due to FPGA (Field Programmable Gate Array) technology's enumerable benefits and applications. A size-minimal and depth-minimal LUT-based BCD adder circuit construction is the main contribution of this paper.
