论文标题
Lagarto I-una Plataforma硬件/软件De Arquitectura de Computadoras para la Academia ERespectionaCión
Lagarto I-Una plataforma hardware/software de arquitectura de computadoras para la academia e investigación
论文作者
论文摘要
微处理器的设计计算机架构仍然是计算机科学和计算机工程学的基本课程。在过去的二十年中,微处理器内部的技术和组织发生了很大变化。这种变化增加了课堂上处理的信息,困难了学生之间的教学/学习过程。尽管有一些工具,主要是模拟器,可以在课程中说明抽象概念,但这些工具并未随着技术而带来。 IPN墨西哥的Centro deRespectionanciónEnComputación的计算机架构小组正在研究一个名为Lagarto的项目,为研究和教育创建开放的计算平台,以简化对计算机架构和操作系统涉及的基本概念的理解。本文介绍了我们的软核处理器微观构造拉加尔托。它具有标量管道结构,并执行完整的MIPS 32 R6 ISA [9] [10],并包括支持现代操作系统的MMU。使用Verilog HDL描述了完整的设计,并且在FPGA中完全合成。此外,这项工作显示了使用用汇编语言或C语言编写的代码使用和测试微处理器的不同方法。我们表明,Lagarto项目允许学生在课程中不仅在通过模拟器中实践练习中可视化理论知识的传统模型,还将其集成到教学过程中,以构建微处理器体系结构。
The design of Microprocessors Computer Architectures remains as a fundamental course in Computer Science and Computer Engineering. The technology and organization inside microprocessors have changed quite fast in the last twenty years. That change has increased the information handled in class, difficulting the teaching/learning process among students. Although there are tools, mainly simulators, available to exemplify abstract concepts during the course, these tools have not come along with the technology. The computer architecture group of the Centro de Investigación en Computación at the IPN Mexico is working on a project called Lagarto to create an open computing platform for research and education to simplify the understanding of fundamental concepts involved in computer architecture and operating systems. This paper introduces Lagarto, our soft-core-processor micro-architecture. It has a scalar pipeline structure and executes a full MIPS 32 R6 ISA [9] [10] and includes an MMU to support modern Operative Systems. The complete design has been described using Verilog HDL and is fully synthesizable in an FPGA. Additionally, this work shows different ways to use and test the microprocessor with codes written in either assembly language or C language. We show that the Lagarto project allows students to incorporate during the course not only the traditional model of visualizing theoretical knowledge in a practical exercise through simulators but also integrate into the teaching process the RTL design to build the Microprocessor Architecture.