论文标题

FlowTune:端到端自动逻辑优化探索通过域特异性多臂强盗

FlowTune: End-to-end Automatic Logic Optimization Exploration via Domain-specific Multi-armed Bandit

论文作者

Neto, Walter Lau, Li, Yingjie, Gaillardon, Pierre-Emmanuel, Yu, Cunxi

论文摘要

近年来,电子设计自动化(EDA)中决策情报的就业越来越多,该智能旨在减少体力劳动并促进现代工具流中的设计封闭过程。但是,现有方法要么需要大量的标记数据和昂贵的培训工作,要么由于计算开销而导致的实用EDA工具流集成限制。本文通过一种新型的高性能域特异性,多阶段的多军匪徒(MAB)方法,提出了合成TOOFLOW优化的通用端到端的顺序决策框架。该框架解决了布尔优化问题的优化问题,例如a)和inv-graphs(#nodes),b)连词正常形式(CNF)最小化(#条款),以满足布尔值;逻辑综合和技术映射问题,例如C)静态时正时分析(STA)延迟和标准细胞技术映射的面积优化,以及D)6英寸LUT体系结构的FPGA技术映射。此外,我们通过端到端的FPGA设计流进行了提出的域特异性MAB方法的高可扩展性和概括性,并在路线后阶段进行了评估,并使用两种不同的FPGA后端工具(OpenFPGA和VPR)和两个不同的逻辑合成表示(AIG和MIGS)。 FlowTune与ABC [1],Yosys [2],VTR [3],Lsoracle [4],OpenFPGA [5]和工业工具完全集成,并公开发布。在流量中的各个设计阶段进行的实验结果都表明,我们的框架在结果质量上均优于手工制作的流[1]和ML探索的流量[6],[7],并且与基于ML的方法相比,数量级更快。

Recent years have seen increasing employment of decision intelligence in electronic design automation (EDA), which aims to reduce the manual efforts and boost the design closure process in modern toolflows. However, existing approaches either require a large number of labeled data and expensive training efforts, or are limited in practical EDA toolflow integration due to computation overhead. This paper presents a generic end-to-end sequential decision making framework FlowTune for synthesis tooflow optimization, with a novel high-performance domain-specific, multi-stage multi-armed bandit (MAB) approach. This framework addresses optimization problems on Boolean optimization problems such as a) And-Inv-Graphs (# nodes), b) Conjunction Normal Form (CNF) minimization (# clauses) for Boolean Satisfiability; logic synthesis and technology mapping problems such as c) post static timing analysis (STA) delay and area optimization for standard-cell technology mapping, and d) FPGA technology mapping for 6-in LUT architectures. Moreover, we demonstrate the high extnsibility and generalizability of the proposed domain-specific MAB approach with end-to-end FPGA design flow, evaluated at post-routing stage, with two different FPGA backend tools (OpenFPGA and VPR) and two different logic synthesis representations (AIGs and MIGs). FlowTune is fully integrated with ABC [1], Yosys [2], VTR [3], LSOracle [4], OpenFPGA [5], and industrial tools, and is released publicly. The experimental results conducted on various design stages in the flow all demonstrate that our framework outperforms both hand-crafted flows [1] and ML explored flows [6], [7] in quality of results, and is orders of magnitude faster compared to ML-based approaches.

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