论文标题
多层电阻记忆中的信息密度
Information Density in Multi-Layer Resistive Memories
论文作者
论文摘要
电阻性记忆将信息存储在两端设备的横梁布置中，这些设备可以编程为高电阻或低电阻的模式。尽管非常紧凑，但该技术遭受了“偷偷摸摸的路径”问题：无法恢复某些信息模式，因为并行的多个低阻力使高电阻与低阻力无法区分。在本文中，考虑了一个多层设备，并且可以精确地得出它可以存储的位数并开发了渐近界。具有极端长宽比的一系列隔离阵列的信息密度是在具有和不具有外围选择电路的单层和多层案例中得出的。与先前考虑的中等纵横比的阵列不同，该密度在极限上是非零的。提出了一个简单的编码方案，该方案渐近地提出了能力。
Resistive memories store information in a crossbar arrangement of two-terminal devices that can be programmed to patterns of high or low resistance. While extremely compact, this technology suffers from the "sneak-path" problem: certain information patterns cannot be recovered, as multiple low resistances in parallel make a high resistance indistinguishable from a low resistance. In this paper, a multi-layer device is considered, and the number of bits it can store is derived exactly and asymptotic bounds are developed. The information density of a series of isolated arrays with extreme aspect ratios is derived in the single- and multi-layer cases with and without peripheral selection circuitry. This density is shown to be non-zero in the limit, unlike that of the arrays with moderate aspect ratios previously considered. A simple encoding scheme that achieves capacity asymptotically is presented.
