论文标题
使用神经网络的高速电流驱动DAC的线性化
Linearization for High-Speed Current-Steering DACs Using Neural Networks
论文作者
论文摘要
本文为高速CS-DAC提出了一种新型的前景线性化方案。该技术利用神经网络（NNS）得出一个将DAC传输特性倒数映射到输入代码的LUT。该算法被证明可以在14nm CMOS中以40.96gs/s（gigasamples-second）运行的最高频率（im）在最高的10位CS-DAC上，至少将传统方法提高至少6dB（IM）的性能（IM）。
This paper proposes a novel foreground linearization scheme for a high-speed CS-DAC. The technique leverages neural networks (NNs) to derive a LUT that maps the inverse of the DAC transfer characteristic onto the input codes. The algorithm is shown to improve conventional methods by at least 6dB in terms of intermodulation (IM) performance for frequencies up to 9GHz on a state-of-the-art 10-bit CS-DAC operating at 40.96GS/s (gigasamples-per-second) in 14nm CMOS.
