论文标题

登记册的投机性删除:复兴的前架

Speculative Dereferencing of Registers:Reviving Foreshadow

论文作者

Schwarzl, Martin, Schuster, Thomas, Schwarz, Michael, Gruss, Daniel

论文摘要

自2016年以来,多次微体系攻击已经利用了归因于预取的影响。这些作品观察到某些用户空间操作可以将内核地址获取到缓存中。将用户无访问数据获取到缓存中,可以使KASLR断开并有助于各种崩溃型攻击,尤其是预示。 在本文中,我们对这种预取效果的根本原因进行了系统的分析。虽然我们确认了先前论文的经验结果,但我们表明,在描述或利用此效果的所有先前论文中,预摘要机制的归因在根本上是不正确的。特别是,预取指令和其他用户空间指令实际上都没有将内核地址预先拿到缓存中,从而导致结论不正确和拟议的防御能力。实际上,在所有这些论文中所利用的效果实际上是由内核中用户空间寄存器的投机性删除引起的。因此,诸如Kaiser之类的缓解技术不会如前所述消除这种泄漏。除了我们对这些先前作品的透彻分析外,我们还通过了解根本原因,即在更受限制的上下文中的地址翻译攻击,在某些方案中直接泄漏寄存器值以及第一个端到端端到端前码(L1TF)利用非L1数据来实现新的攻击。即使启用了建议的预防缓解,后者也有效,从而恢复了预防攻击。我们证明,即使在最新的Intel CPU上也存在这些脱位效应,并具有最新的硬件缓解措施,以及以前认为不受影响的CPU,即ARM,IBM和AMD CPU。

Since 2016, multiple microarchitectural attacks have exploited an effect that is attributed to prefetching. These works observe that certain user-space operations can fetch kernel addresses into the cache. Fetching user-inaccessible data into the cache enables KASLR breaks and assists various Meltdown-type attacks, especially Foreshadow. In this paper, we provide a systematic analysis of the root cause of this prefetching effect. While we confirm the empirical results of previous papers, we show that the attribution to a prefetching mechanism is fundamentally incorrect in all previous papers describing or exploiting this effect. In particular, neither the prefetch instruction nor other user-space instructions actually prefetch kernel addresses into the cache, leading to incorrect conclusions and ineffectiveness of proposed defenses. The effect exploited in all of these papers is, in fact, caused by speculative dereferencing of user-space registers in the kernel. Hence, mitigation techniques such as KAISER do not eliminate this leakage as previously believed. Beyond our thorough analysis of these previous works, we also demonstrate new attacks enabled by understanding the root cause, namely an address-translation attack in more restricted contexts, direct leakage of register values in certain scenarios, and the first end-to-end Foreshadow (L1TF) exploit targeting non-L1 data. The latter is effective even with the recommended Foreshadow mitigations enabled and thus revives the Foreshadow attack. We demonstrate that these dereferencing effects exist even on the most recent Intel CPUs with the latest hardware mitigations, and on CPUs previously believed to be unaffected, i.e., ARM, IBM, and AMD CPUs.

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