论文标题
关于FPGA的非关系数据库:调查,设计决策,挑战
Non-Relational Databases on FPGAs: Survey, Design Decisions, Challenges
论文作者
论文摘要
由于数据模型的多样性和可扩展性,因此非关联数据库系统(NRDS)(例如图形,文档,键值和范围)在各种趋势(业务)应用领域(如智能物流,社交网络分析和医疗应用)等各种趋势(业务)应用领域中引起了很多关注。广泛的数据变化和数据集的大小对系统设计和运行时(包括功耗)构成了独特的挑战。尽管CPU性能缩放变得越来越困难,但我们认为NRD可以从添加现场可编程栅极阵列(FPGA)作为加速器中受益。但是,尚未系统地研究FPGA加速的NRD。 为了促进对这个新兴领域的理解,我们探索了FPGA加速度对NRD的拟合,重点是数据模型。我们将术语NRDS类定义为支持相同数据模型的一组非关系数据库系统。这项调查描述并分类了相关NRDS类的固有差异和非平凡的权衡以及在使用FPGA建立此类系统时,在共同设计决策的情况下,它们的共同点及其共同点。例如,我们在文献中发现,对于钥匙值商店,应将FPGA作为智能网络接口卡(SmartNIC)放入系统中,以受益于FPGA直接访问网络。但是,更复杂的数据模型和其他类(例如图形和文档)的处理通常需要更详细的近数据或套接字加速器位置,其中FPGA分别具有对主内存的唯一或共享访问权限。在不同的类别中,FPGA可以用作通信层,也可以作为操作员和数据访问的加速度。我们面临开放的研究和工程挑战,以概述FPGA加速NRDS的未来。
Non-relational database systems (NRDS), such as graph, document, key-value, and wide-column, have gained much attention in various trending (business) application domains like smart logistics, social network analysis, and medical applications, due to their data model variety and scalability. The broad data variety and sheer size of datasets pose unique challenges for the system design and runtime (incl. power consumption). While CPU performance scaling becomes increasingly more difficult, we argue that NRDS can benefit from adding field programmable gate arrays (FPGAs) as accelerators. However, FPGA-accelerated NRDS have not been systematically studied, yet. To facilitate understanding of this emerging domain, we explore the fit of FPGA acceleration for NRDS with a focus on data model variety. We define the term NRDS class as a group of non-relational database systems supporting the same data model. This survey describes and categorizes the inherent differences and non-trivial trade-offs of relevant NRDS classes as well as their commonalities in the context of common design decisions when building such a system with FPGAs. For example, we found in the literature that for key-value stores the FPGA should be placed into the system as a smart network interface card (SmartNIC) to benefit from direct access of the FPGA to the network. However, more complex data models and processing of other classes (e.g., graph and document) commonly require more elaborate near-data or socket accelerator placements where the FPGA respectively has the only or shared access to main memory. Across the different classes, FPGAs can be used as communication layer or for acceleration of operators and data access. We close with open research and engineering challenges to outline the future of FPGA-accelerated NRDS.