论文标题
使用极端介电常数的静电工程，用于超宽带隙半导体晶体管的静电材料
Electrostatic Engineering using Extreme Permittivity Materials for Ultra-wide Bandgap Semiconductor Transistors
论文作者
论文摘要
超宽的带隙材料（例如$β$ -GA $ _ \ MATHRM {2} $ o $ $ _ \ MATHRM {3} $）的性能非常取决于在设备的活动区域内实现高平均电场。在本报告中，我们表明，像Batio $ _ \ Mathrm {3} $这样的高K门电介质可以通过改善横向场效应晶体管的栅极填充区域中电场谱的均匀性来提供有效的现场管理策略。使用此策略，我们能够在Gate-Drain间距（L $ _ \ Mathrm {GD} $）时达到高平均分解场和4 mv/cm的6 um和0.6 um和0.6 um，分别为$β$ -GA $ -GA $ -GA $ -GA $ _ \ MATHRM {2} $ o $ $ o $ o $ $ _ \ a \ MATHR MEATH a高。 1.8x10 $^\ mathrm {13} $ cm $^\ mathrm {-2} $。高表电荷密度与高击故障字段一起实现了创纪录的功能数字（V $^\ Mathrm {2} $$ _ \ MATHRM {BR} $/R $ _ \ MATHRM {on} $）的376 mw/cm $ $ $ $ $ $ $^\^\ mathrm {2} $在闸门上的376 mw/cm $ $^\^\ mathrm {2}。
The performance of ultra-wide band gap materials like $β$-Ga$_\mathrm{2}$O$_\mathrm{3}$ is critically dependent on achieving high average electric fields within the active region of the device. In this report, we show that high-k gate dielectrics like BaTiO$_\mathrm{3}$ can provide an efficient field management strategy by improving the uniformity of electric field profile in the gate-drain region of lateral field effect transistors. Using this strategy, we were able to achieve high average breakdown fields of 1.5 MV/cm and 4 MV/cm at gate-drain spacing (L$_\mathrm{gd}$) of 6 um and 0.6 um respectively in $β$-Ga$_\mathrm{2}$O$_\mathrm{3}$, at a high channel sheet charge density of 1.8x10$^\mathrm{13}$cm$^\mathrm{-2}$. The high sheet charge density together with high breakdown field enabled a record power figure of merit (V$^\mathrm{2}$$_\mathrm{br}$/R$_\mathrm{on}$) of 376 MW/cm$^\mathrm{2}$ at a gate-drain spacing of 3 um.
